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IP Core

Ethernet Layer 2 Switch IP Core Family for Altera FPGAs

The Switch IP Core was designed especially as a multiport add-on for embedded devices, controllers, drives, and IOs, and supports the simple implementation of a scalable FPGA-based 10/100 MBit Ethernet switch with up to 8 ports.

Especially in the automation field, Ethernet or Industrial Ethernet has become a basic component of many embedded devices. This is particularly due to Ethernet's advantages, such as its high bandwidth, the topological flexibility already known and loved in the IT world, its cost-effective and reliable cabling, and the pervasive availability of services from the control level to the process level right down to the field level. Both the flexibility of its topology and the ubiquity of services are made possible by the use of topology components such as hubs, switches, routers, bridges, and gateways.

But the most frequently used component is the switch, because with Ethernet, and with the Industrial Ethernet protocols based on standard Ethernet, no topology beyond direct point-to-point connections can be implemented without a switch (except for 10BASE2 or 10BASE5). Protocols based on the half-duplex process need at least a hub. These stand-alone topology components generate additional costs for procurement, power supply, monitoring, and maintenance.

Switch IP Core

The Switch IP Core developed by IXXAT permits the direct addition of the functionality of a switch topology component to an embedded device. In the simplest case, a switch with two external ports is needed to implement a line topology. Every additional port extends the options for support of star or tree topologies and their mixed variants.

The Switch IP Core can easily be integrated into the FPGA already in use or into a separate one. The additional hardware costs remain low, since the IP works exclusively with FPGA-internal resources and only inexpensive Ethernet components like PHY and connectors are needed for each port.

Functionality

  • Store and forward switch
  • 10/100 Mbit
  • Full/half duplex
  • Supports two priorities (VLAN tags)

Scope of delivery

  • Altera Mega Core (full license or OpenCore+)
  • Encrypted VHDL code
  • Device driver and example application in C
  • Manual
  • Quick-start guide
  • 45 days of technical support

Technical data

  • Up to 8 ports (MII), of which at most one internal port (32-bit Avalon streaming interface)
  • Address table with up to 512 entries (including multicast)
  • Configurable address table (static, self-learning, aging)
  • Multicast filter for internal port
  • Latency time: 7.3 - 9.8 µs (three external ports)
  • VLAN: transparent mode
  • FDX/HDX/data rate separately configurable for each port
  • Four 32-bit statistics counters per port
  • Switch fabric: throughput >= 1.6 GB/sec (100 % wirespeed full-duplex)
  • 802.1p/g priorities are used (low/high threshold configurable)

Supplemental services
(not included in scope of delivery):

  • Maintenance agreement
    As extension to the IP Core, IXXAT offers a maintenance agreement. The maintenance agreement includes the following services during the agreement period:
    - Free updates and error correction
    - Technical support
  • Implementation support
  • IXXAT can carry out the customization, implementation, and testing of the IP Core for your hardware or application.