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技术参数
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MOST 控制器
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OS81110
Access via Vector MediaLB+® FPGA IP-core with 8192fs (400 Mbps)
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运行模式
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Master, Static Master, Slave, Spy*, Bypass
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支持通道
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Control messages, asynchronous packets, Ethernet packets and synchronous streams
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Spy* for the control and packets channel
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Vector Spy150-IP-core in the FPGA, can be activated individually or
in parallel to all other modes and channels, amongst others recording of
Preemptive-Acknowledge-Information and comprehensive bus statistics
(Msgs/s; Packets/s)
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控制报文
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Full bandwidth of the INIC applicable for Tx and/or Rx via 8192fs MLB+IP-core
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异步数据和以太网数据包
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Full bandwidth of the INIC applicable for Tx and/or Rx via 8192fs MLB+IP-core,
packet length up to 1524 Byte for MOST packets for Rx and Tx
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主节点帧频率
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44.1 kHz and 48 kHz selectable
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PC 接口
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USB 2.0 highspeed
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MOST 连接器
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MOST 2+0, AFBR-1150L / AFBR-2150L transceiver; compliance certified
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支持MOST ECL
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Tx and/or Rx, configurable terminating resistor, 5..30V
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工作环境
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Temperature: -40 °C..+60 °C (operation and storage)
Humidity: 15 %...90 %, non-condensing
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操作系统
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Windows XP: 32 bit (SP3), Windows Vista: 32 bit (SP1), Windows 7: 32 bit / 64 bit
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规格 (长x宽x高)
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Approx. 140 x 105 x 32 mm
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功耗
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Startup: 7 V..50 V
Operating: 5 V..50 V, approx. 7 W
Boot time approx. 1 s
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时钟精度
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Time stamp accuracy: 1 us; reaction time Rx => Tx: typ. <1 ms
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音频输入/输出
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Digital: optical, S/PDIF, 16 bit stereo, 44,1kHz / 48kHz with sample rate converter
Analog: 1 x line in, 1 x line out
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干扰发生器
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Light+Lock as well as message generation with free configurable
payload including configurable consecutive counter on control channel,
data packet channel and Ethernet packet channel
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电隔离
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USB / Audio, power supply, SyncLine and ECL are separated from each other
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12522120
12522120
+86-14782588945
